About 118,000 results
Open links in new tab
  1. How to verify timing for Agilex DDR4 Post Layout

    Jan 31, 2025 · Hello, How do I verify that my layout is meeting timing requirements with Agilex 7 and a Quartus Prime Pro 24.1.0.115. I am trying to verify that a DDR4 design meets timing …

  2. Agelix 5 IBIS AMI Models - Intel Community

    Sep 29, 2024 · I"ve downloaded the IBIS models and need run board sims for Agelix 5 board. I need to run DDR4 wizzard in Hyperlynx with AMI or non AMI model

  3. Re:DRC rules Script issue - Intel Community

    Hi Sir, The error comes from the hyperlynx tools instead of Intel FPGA's tools. Thus, you need to contact hyperlynx to get the support.

  4. Re: Re:Arria 10 DDR4 IP - Using Hyperlynx DDRx Batch Wizard …

    Sep 12, 2022 · We are using Hyperlynx to extract the channel loss/crosstalk values used for the Quartus IP parameters. Our issue is that some of the nets (BA0, ODT0 specifically), are failing …

  5. Intel Unified Login

    A required field is missing. Please fill out all required fields and try again.

  6. help with hyperlynx simulation for cyclone2 - Intel Community

    Sep 24, 2008 · Hi, In Hyperlynx, click SELECT-> COMPONENTS VALUES AND MODEL SETTING-> IC tab-> choose OUTPUT in BUFFER SETTING. I hope this help, let me know if …

  7. Re: IBIS or IBIS-AMI model for SSD card - Intel Community

    Oct 25, 2019 · Hi, I need an IBIS or IBIS-AMI models for SSD card M.2 for running our signal integrity analysis using Hyperlynx. For our design used this part SSDPEKKA512G8.

  8. Hyperlynx IBIS : What is cmos25_io_r50 - Intel Community

    Jun 4, 2015 · I'm currently performing Hyperlynx simulations of an Arria II Gx FPGA design. I generated my ibis model with Quartus 11.0sp1 So far, everything works pretty good however I …

  9. Re:Hyperlynx DDRx Batch Wizard - Channel Loss Calculation Tool

    Jul 25, 2022 · The only way Quartus could have affected this system is the IBIS model for our FPGA that was generated through Quartus. I am using Hyperlynx BoardSim VX.2.3_Update2 …

  10. Re: HCSL I/O with Altera IBIS - Intel Community

    Nov 15, 2011 · You need to use a simulator that can handle HSPICE models. Beware with Hyperlynx, to use HSPICE models. It will allow you to use SPICE models, but it still requires …